MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 298

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Watchdog Timer Module
14.6 Memory Map and Registers
14.6.1 Memory Map
14.6.2 Registers
Advance Information
298
This subsection describes the memory map and registers for the
watchdog timer. The watchdog timer has a base address of
0x00c7_0000.
Refer to
The watchdog timer programming model consists of these registers:
1. S = CPU supervisor mode access only. S/U = CPU supervisor or user mode access. User
0x00c7_0000
0x00c7_0002
0x00c7_0004
0x00c7_0006
Freescale Semiconductor, Inc.
mode accesses to supervisor only addresses have no effect and result in a cycle termina-
tion transfer error.
Address
For More Information On This Product,
The Watchdog Control Register (WCR) configures watchdog timer
operation. See
The Watchdog Modulus Register (WMR) determines the timer
modulus reload value. See
Register.
The Watchdog Count Register (WCNTR) provides visibility to the
watchdog counter value. See
Register.
The Watchdog Service Register (WSR) requires a service
sequence to prevent reset. See
Register.
Table 14-1
Table 14-1. Watchdog Timer Module Memory Map
Go to: www.freescale.com
Watchdog Timer Module
for an overview of the watchdog memory map.
14.6.2.1 Watchdog Control
Bits 15–8
Watchdog Count Register (WCNTR)
Watchdog Modulus Register (WMR)
Watchdog Control Register (WCR)
Watchdog Service Register (WSR)
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
14.6.2.2 Watchdog Modulus
14.6.2.3 Watchdog Count
14.6.2.4 Watchdog Service
Bits 7–0
Register.
MOTOROLA
Access
S/U
S/U
S
S
(1)

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