MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 484

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Queued Analog-to-Digital Converter (QADC)
Advance Information
484
Q1:
Q2:
QS:
Q1:
Q2:
QS:
0000
IDLE
Q1:
IDLE
T1
0000
C1
IDLE
ACTIVE
TOR1
T1
1000
IDLE
Situation S3
the trigger overrun error status bit is set the same way and that queue
execution continues unchanged.
The next two situations consider trigger events that occur for the lower
priority queue 2, while queue 1 is actively being serviced.
Situation S4
recognized while queue 1 is active is saved, and as soon as queue 1 is
finished, queue 2 servicing begins.
C2
Freescale Semiconductor, Inc.
Figure 19-25. CCW Priority Situation 3
Figure 19-26. CCW Priority Situation 4
Q1:
PF1
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
T1
0100
C1
Q2:
1000
T2
Go to: www.freescale.com
C2
(Figure
PAUSE
Q2:
(Figure
ACTIVE
C1
TOR2
ACTIVE
T2
T2
0110
TRIGGERED
C3
C2
1011
PF2
19-25) shows that when the pause feature is used,
19-26) shows that a queue 2 trigger event is
C4
0101
CF1
T1
C1
C3
TOR1
ACTIVE
T1
1001
PAUSE
C2
ACTIVE
C4
0010
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
CF1
C3
0001
C4
T2
CF2
IDLE
C3
TOR2
ACTIVE
T2
0010
IDLE
C4
CF2
IDLE
0000
IDLE
0000
MOTOROLA