MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 66
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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System Memory Map
Advance Information
66
Clocks (CLOCK)
P = Current pin state
0x00c2_0006
0x00c2_0007
0x00c2_0008
0x00c3_0000
0x00c3_0001
0x00c3_0002
0x00c2_ffff
Address
Register Name
Register 3 (CSCR3)
Synthesizer Control
Chip Select Control
U = Unaffected
Synthesizer Status
Register (SYNCR)
Register (SYNSR)
Unimplemented
See page 553.
See page 250.
See page 253.
Figure 2-4. Register Summary (Sheet 10 of 37)
Freescale Semiconductor, Inc.
For More Information On This Product,
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read: PLLMODE
Write:
Write:
Write:
Write:
Write:
Notes:
LOCEN
LOLRE
Note 1
1. Reset state determined during reset configuration
2. See the LOCKS and LOCK bit descriptions.
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
SO
Go to: www.freescale.com
0
0
0
0
0
Access results in a bus monitor timeout generating an access termination transfer error.
System Memory Map
= Writes have no effect and the access terminates without a transfer error exception.
DISCLK
PLLSEL
Note 1
MFD2
RO
14
14
0
6
0
0
6
0
6
0
6
PLLREF
FWKUP
Note 1
MFD1
PS
13
13
1
5
0
0
5
1
5
0
5
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
LOCKS
RSVD4
Note 2
WWS
MFD0
12
12
1
4
0
0
4
0
4
0
4
Bit Number
STMPD1
LOCRE
Note 2
LOCK
WE
11
11
1
3
0
0
3
0
3
0
3
STMPD0
LOCS
RFD2
WS2
10
10
1
2
0
0
2
0
2
0
2
0
RSVD1
TAEN
RFD1
WS1
9
1
1
1
1
9
0
1
0
1
0
0
MOTOROLA
RSVD0
CSEN
RFD0
WS0
Bit 8
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
1
0
1
0
0
0
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