MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 487
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
QS:
Q1:
Q2:
QS:
Q1:
Q2:
0000
IDLE
Q2:
IDLE
IDLE
T2
0000
IDLE
C1
C1
ACTIVE
0010
Situations S8 and S9
two situations with the RESUME bit set to a 1. When the RESUME bit is
set, following suspension, queue 2 resumes execution with the aborted
CCW, not the first CCW, in the queue.
C2
Q1:
Freescale Semiconductor, Inc.
Q1:
Figure 19-30. CCW Priority Situation 8
Figure 19-31. CCW Priority Situation 9
T1
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
T1
C1
SUSPEND
ACTIVE
C1
1010
ACTIVE
1000
C2
C2
Go to: www.freescale.com
PF1
PF1
0110
ACT
C2
0100
Q2:
PF2
PAUSE
T2
0101
PAUSE
PAUSE
(Figure 19-30
C1
ACTIVE
T2
0110
C3
ACTIVE
C2
0110
T1
C4
SUSPEND
C3
ACTIVE
ACTIVE
T1
1010
Queued Analog-to-Digital Converter (QADC)
SUSPEND
C3
ACTIVE
C4
1010
and
CF1
C4
Figure
C2
CF1
0010
ACT
ACTIVE
C4
0010
C3
CF2
19-31) repeat the same
C4
IDLE
RESUME=1
CF2
IDLE
Advance Information
IDLE
0000
RESUME=1
IDLE
0000
Digital Control
487
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