MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 157

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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6.3.2 Wait Mode
6.3.3 Doze Mode
6.3.4 Stop Mode
6.3.5 Peripheral Shut Down
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Wait mode is intended to be used to stop only the CPU and memory
clocks until a wakeup event is detected. In this mode, peripherals may
be programmed to continue operating and can generate interrupts,
which cause the CPU to exit from wait mode.
Doze mode affects the CPU in the same manner as wait mode, except
that each peripheral defines individual operational characteristics in
doze mode. Peripherals which continue to run and have the capability of
producing interrupts may cause the CPU to exit the doze mode and
return to run mode. Peripherals which are stopped will restart operation
on exit from doze mode as defined for each peripheral.
Stop mode affects the CPU in the same manner as the wait and doze
modes, except that all clocks to the system are stopped and the
peripherals cease operation.
Stop mode must be entered in a controlled manner to ensure that any
current operation is properly terminated. When exiting stop mode, most
peripherals retain their pre-stop status and resume operation.
The following subsections specify the operation of each module while in
and when exiting low-power modes.
Most peripherals may be disabled by software in order to cease internal
clock generation and remain in a static state. Each peripheral has its own
specific disabling sequence (refer to each peripheral description for
further details). A peripheral may be disabled at any time and will remain
disabled during any low-power mode of operation.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Power Management
Advance Information
Power Management
Low-Power Modes
157

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