MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 123
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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4.4.1 Master Mode
4.4.2 Single-Chip Mode
4.4.3 Emulation Mode
4.4.4 Factory Access Slave Test (FAST) Mode
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
In master mode, the internal central processor unit (CPU) can access
external memories and peripherals. Full master mode functionality
requires the bonding out of the optional pins. The external bus consists
of a 32-bit data bus and 23 address lines. Available bus control signals
include R/W, TC[2:0], TSIZ[1:0], TA, TEA, OE, and EB[3:0]. Up to four
chip selects can be programmed to select and control external devices
and to provide bus cycle termination. When interfacing to 16-bit ports,
the ports C and D pins and EB[3:2] can be configured as
general-purpose input/output (I/O).
In single-chip mode, all memory is internal to the chip. External bus pins
are configured as digital I/O.
Emulation mode supports external port replacement logic. All ports are
emulated and all primary pin functions are enabled. Since the full
external bus must be visible to support the external port replacement
logic, the emulation mode pin configuration resembles master mode.
Full emulation mode functionality requires bonding out the optional pins.
Emulation mode chip selects are provided to give additional information
about the bus cycle. Also, the signal SHS is provided as a strobe for
capturing addresses and data during show cycles.
FAST mode is for factory test only.
Freescale Semiconductor, Inc.
For More Information On This Product,
Chip Configuration Module (CCM)
Go to: www.freescale.com
Chip Configuration Module (CCM)
Advance Information
Modes of Operation
123
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