MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 527

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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20.1 Contents
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Advance Information — MMC2114, MMC2113, and MMC2112
Section 20. External Bus Interface Module (EBI)
20.2
20.3
20.3.1
20.3.2
20.3.3
20.3.4
20.3.5
20.3.6
20.3.7
20.3.8
20.3.9
20.3.10 Chip Selects (CS[3:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
20.3.11 Output Enable (OE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
20.3.12 Transfer Size (TSIZ[1:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . 532
20.3.13 Processor Status (PSTAT[3:0]) . . . . . . . . . . . . . . . . . . . . . 532
20.4
20.5
20.6
20.7
20.7.1
20.7.1.1
20.7.1.2
20.7.1.3
20.7.2
20.7.2.1
20.7.2.2
20.7.2.3
Freescale Semiconductor, Inc.
For More Information On This Product,
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528
Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .529
Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . 532
Operand Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 532
Enable Byte Pins (EB[3:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . 534
Bus Master Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 534
External Bus Interface Module (EBI)
Data Bus (D[31:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 530
Show Cycle Strobe (SHS) . . . . . . . . . . . . . . . . . . . . . . . . . 530
Transfer Acknowledge (TA) . . . . . . . . . . . . . . . . . . . . . . . . 530
Transfer Error Acknowledge (TEA) . . . . . . . . . . . . . . . . . .530
Emulation Mode Chip Selects (CSE[1:0]) . . . . . . . . . . . . . 530
Transfer Code (TC[2:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
Read/Write (R/W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
Address Bus (A[22:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
Enable Byte (EB[3:0]). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531
Read Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 535
Write Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 537
State 1 (X1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 536
Optional Wait States (X2W) . . . . . . . . . . . . . . . . . . . . . . 536
State 2 (X2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 536
State 1 (X1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 538
Optional Wait States (X2W) . . . . . . . . . . . . . . . . . . . . . . 538
State 2 (X2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 538
Go to: www.freescale.com
Advance Information
527

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