MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 134
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chip Configuration Module (CCM)
Advance Information
134
1. Modifying the default configurations is possible only if the external RCON pin is asserted.
2. The D[31:29, 28, 27, 25:24, 20, 15:0] pins do not affect reset configuration.
3. The external reset override circuitry drives the data bus pins with the override values while RSTOUT is asserted. It must
4. Default configuration
A[22:0], EB[3:0], CS[3:0]
D[31:0], SHS, TA, TEA,
CSE[1:0], TC[2:0], OE,
stop driving the data bus pins within one CLKOUT cycle after RSTOUT is negated. To prevent contention with the external
reset override circuitry, the reset override pins are forced to inputs during reset and do not become outputs until at least
one CLKOUT cycle after RSTOUT is negated.
Pin(s) Affected
All output pins
Clock mode
CS[1:0]
If the external RCON pin is asserted during reset, then various chip
functions, including the reset configuration pin functions after reset, are
configured according to the levels driven onto the external data pins.
(See
the levels on the external configuration pins to allow for module
configuration.
Table 4-7. Configuration During Reset
RCON[3:2] = 10
RCON[7:6] = 11
Freescale Semiconductor, Inc.
Configuration
RCON0 = 0
RCON5 = 0
For More Information On This Product,
Table
Default
Chip Configuration Module (CCM)
4-7.) The internal configuration signals are driven to reflect
Go to: www.freescale.com
PLLEN, D[23:22]
Override Pins
in Reset
D[26,17:16]
D[19:18]
0XX
0XX
10X
D21
10X
111
110
110
111
X0
01
11
0
1
(2),(3)
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
Master mode
Single-chip mode
FAST mode
Emulation mode
Internal with 32-bit port
External with 16-bit port
External with 32-bit port
Default strength
Full strength
External clock mode (PLL disabled)
1:1 PLL mode
Normal PLL mode with external
clock reference
Normal PLL mode w/crystal
oscillator reference
Output Pad Drive Strength
(1)
Chip Mode Selected
Boot Device
Clock Mode
Function
(4)
(4)
(4)
(4)
MOTOROLA
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