MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 9

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
3.5.8
3.5.8.1
3.5.8.2
3.5.8.3
3.5.8.4
3.5.9
3.5.9.1
3.5.9.2
3.5.9.3
3.5.9.4
3.5.9.5
3.5.9.6
3.5.10
3.5.11
3.5.11.1
3.5.11.2
3.5.11.3
4.1
4.2
4.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.5
4.6
4.7
4.7.1
4.7.2
4.7.3
4.7.3.1
4.7.3.2
4.7.3.3
4.7.3.4
Freescale Semiconductor, Inc.
For More Information On This Product,
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .124
Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Section 4. Chip Configuration Module (CCM)
Analog-to-Digital Converter Signals . . . . . . . . . . . . . . . . . . 118
Debug and Emulation Support Signals . . . . . . . . . . . . . . . 119
Test Signal (TEST). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Power and Ground Signals . . . . . . . . . . . . . . . . . . . . . . . . 120
Master Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Single-Chip Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Emulation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123
Factory Access Slave Test (FAST) Mode . . . . . . . . . . . . . 123
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Analog Inputs (PQA[4:3], PQA[1:0], and PQB[3:0]) . . . . 118
Analog Reference (V
Test Reset (TRST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Test Clock (TCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Test Mode Select (TMS) . . . . . . . . . . . . . . . . . . . . . . . . 119
Test Data Input (TDI) . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Test Data Output (TDO). . . . . . . . . . . . . . . . . . . . . . . . . 119
Chip Configuration Register . . . . . . . . . . . . . . . . . . . . . . 126
Reset Configuration Register . . . . . . . . . . . . . . . . . . . . . 129
Chip Identification Register . . . . . . . . . . . . . . . . . . . . . . 131
Chip Test Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Analog Supply (V
Positive Supply (V
Debug Event (DE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Standby Power (V
Positive Supply (V
Ground (V
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Table of Contents
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
DDA
STBY
DDH
DD
). . . . . . . . . . . . . . . . . . . . . . . . . . . 120
RH
and V
) . . . . . . . . . . . . . . . . . . . . . . . . . 118
) . . . . . . . . . . . . . . . . . . . . . . . . . 120
and V
SSA
RL
) . . . . . . . . . . . . . . . . . .118
) . . . . . . . . . . . . . . . . . 118
Advance Information
Table of Contents
9

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