MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 519

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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19.11.6 Analog Input Considerations
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
The current into (I
coupling ratio) of the parasitic bipolar transistor (K
expressed by this equation:
Where:
A method for minimizing the impact of stress conditions on the QADC is
to strategically allocate QADC inputs so that the lower accuracy inputs
are adjacent to the inputs most likely to see stress conditions.
Also, suitable source impedances should be selected to meet design
goals and minimize the effect of stress conditions.
The source impedance of the analog signal to be measured and any
intermediate filtering should be considered whether external
multiplexing is used or not.
typical analog signal sources to one QADC analog input pin through a
separate multiplexer chip. Also, an example of an analog signal source
connected directly to a QADC analog input channel is displayed.
I
I
Freescale Semiconductor, Inc.
In
INJ
For More Information On This Product,
Queued Analog-to-Digital Converter (QADC)
= – K
is either I
N
Go to: www.freescale.com
* I
INJ
INJN
In
) the neighboring pin is determined by the K
or I
INJP
Figure 19-52
.
Queued Analog-to-Digital Converter (QADC)
shows the connection of eight
Pin Connection Considerations
N
‹‹ 1). The I
Advance Information
N
In
(current
can be
519

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