MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 48

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MMC2114CFCAG33

Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Datasheets

Specifications of MMC2114CFCAG33

Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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General Description
Advance Information
48
Freescale Semiconductor, Inc.
For More Information On This Product,
Two timers:
– Four 16-bit input capture/output compare channels
– 16-bit architecture
– 16-bit pulse accumulator
– Pulse widths variable from microseconds to seconds
– Eight selectable prescalers
– Toggle-on-overflow feature for pulse-width modulation
Queued analog-to-digital converter (QADC):
– Eight analog input channels
– 10-bit resolution ±2 counts accuracy
– Minimum 7 s conversion time
– Internal sample and hold
– Programmable input sample time for various source
– Two conversion command queues with a total of 64 entries
– Subqueues possible using pause mechanism
– Queue complete and pause interrupts available on both
– Queue pointers indicate current location for each queue
– Automated queue modes initiated by:
– Single-scan or continuous-scan of queues
– Output data readable in three formats:
– Unused analog channels can be used as digital I/O
– Minimum pin set configuration implemented
impedances
queues
Go to: www.freescale.com
External edge trigger and gated trigger
Periodic/interval timer, within queued analog-to-digital
Software command
Right-justified unsigned
Left-justified signed
Left-justified unsigned
General Description
converter (QADC) module {queue1 and queue2}
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA

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