MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 15
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
11.7
11.7.1
11.7.2
11.7.2.1
11.7.2.2
11.7.2.3
11.7.2.4
11.8
11.8.1
11.8.2
11.8.3
11.8.3.1
11.8.3.2
11.8.4
11.8.4.1
11.8.4.2
11.8.5
11.8.6
11.8.6.1
11.8.6.2
11.8.6.3
11.8.6.4
11.9
11.10 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
12.1
12.2
12.3
12.4
12.4.1
12.4.2
12.4.2.1
12.4.2.2
12.4.2.3
12.4.2.4
Freescale Semiconductor, Inc.
For More Information On This Product,
Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . 249
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 272
Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Memory Map and Registers . . . . . . . . . . . . . . . . . . . . . . . . . . 273
Module Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 249
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
System Clock Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
System Clocks Generation. . . . . . . . . . . . . . . . . . . . . . . . . 259
PLL Lock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259
Loss of Clock Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . 261
Clock Operation During Reset . . . . . . . . . . . . . . . . . . . . . . 266
PLL Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 274
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
Synthesizer Control Register . . . . . . . . . . . . . . . . . . . . . 250
Synthesizer Status Register. . . . . . . . . . . . . . . . . . . . . . 253
Synthesizer Test Register . . . . . . . . . . . . . . . . . . . . . . .256
Synthesizer Test Register 2 . . . . . . . . . . . . . . . . . . . . . . 257
PLL Loss of Lock Conditions . . . . . . . . . . . . . . . . . . . . . 261
PLL Loss of Lock Reset . . . . . . . . . . . . . . . . . . . . . . . . . 261
Alternate Clock Selection . . . . . . . . . . . . . . . . . . . . . . . . 262
Loss-of-Clock Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . .265
Phase and Frequency Detector (PFD). . . . . . . . . . . . . .268
Charge Pump/Loop Filter . . . . . . . . . . . . . . . . . . . . . . . . 268
Voltage Control Output (VCO) . . . . . . . . . . . . . . . . . . . . 269
Multiplication Factor Divider (MFD) . . . . . . . . . . . . . . . . 269
Port Output Data Registers . . . . . . . . . . . . . . . . . . . . . . 275
Port Data Direction Registers. . . . . . . . . . . . . . . . . . . . . 276
Port Pin Data/Set Data Registers . . . . . . . . . . . . . . . . . 277
Port Clear Output Data Registers . . . . . . . . . . . . . . . . . 278
Go to: www.freescale.com
Table of Contents
Section 12. Ports Module
Advance Information
Table of Contents
15
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