MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 137
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
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4.8.4 Output Pad Strength Configuration
4.8.5 Clock Mode Selection
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
External clock mode; PLL disabled
1:1 PLL mode
Normal PLL mode; external clock reference
Normal PLL mode; crystal oscillator reference
1. Modifying the default configurations is possible only if the external RCON pin is asserted low.
Clock Mode
Output pad strength is determined during reset configuration as shown
in
capability for each setting. Once reset is exited, the output pad strength
configuration can be changed by programming the LOAD bit of the Chip
Configuration Register.
The clock mode is selected during reset and reflected in the PLLMODE,
PLLSEL, and PLLREF bits of SYNSR. Once reset is exited, the clock
mode cannot be changed.
Table 4-12
Output pads configured for default strength
Output pads configured for full strength
1. Modifying the default configurations is possible only if the external RCON pin is asserted
Table
Freescale Semiconductor, Inc.
low.
Table 4-12. Clock Mode Selection
For More Information On This Product,
Optional Pin Function Selection
Table 4-11. Output Pad Driver Strength Selection
4-11. See
Chip Configuration Module (CCM)
summarizes clock mode selection during reset configuration.
Go to: www.freescale.com
23.7 DC Electrical Specifications
PLLEN driven high
PLLEN driven high
PLLEN driven high
PLLEN driven low
MODE Bit
Synthesizer Status Register (SYNSR)
D23 driven high
D23 driven high
D23 driven low
D23 don’t care
(1)
PLLSEL Bit
Chip Configuration Module (CCM)
CCR Register LOAD Bit
D21 driven high
D21 driven low
Functional Description
Advance Information
for drive
D22 driven high
D22 driven low
D22 don’t care
D22 don’t care
PLLREF Bit
(1)
137
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