R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 892
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 19 Serial Communication Interface (SCI, CRC)
19.3.8
SCMR selects smart card interface mode and its format.
Rev. 1.00 Jan. 29, 2010 Page 860 of 1380
REJ09B0596-0100
Bit
7 to 4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
⎯
SDIR
SINV
⎯
SMIF
Smart Card Mode Register (SCMR)
⎯
⎯
7
1
Initial
Value
All 1
0
0
1
0
⎯
⎯
6
1
R/W
⎯
R/W
R/W
⎯
R/W
⎯
⎯
5
1
Description
Reserved
These bits are always read as 1.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: Transfer with LSB-first
1: Transfer with MSB-first
This bit is valid only when the 8-bit data format is used for
transmission/reception; when the 7-bit data format is
used, data is always transmitted/received with LSB-first.
Smart Card Data Invert
Inverts the transmit/receive data logic level. This bit does
not affect the logic level of the parity bit. To invert the
parity bit, invert the O/E bit in SMR.
0: TDR contents are transmitted as they are. Receive
1: TDR contents are inverted before being transmitted.
Reserved
This bit is always read as 1.
Smart Card Interface Mode Select
When this bit is set to 1, smart card interface mode is
selected.
0: Normal asynchronous or clocked synchronous mode
1: Smart card interface mode
data is stored as it is in RDR.
Receive data is stored in inverted form in RDR.
⎯
⎯
4
1
SDIR
R/W
3
0
SINV
R/W
2
0
⎯
⎯
1
1
SMIF
R/W
0
0
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