UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 123

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Digital I/O
selection
Analog input
selection
Reset signal generation sets port 2 to analog input.
Figures 4-11 to 4-14 show block diagrams of port 2.
Caution Make the AV
Register
ADPC0
Remark ADPC0:
Digital I/O
selection
Analog input
selection
ADPC0 Register
Input mode
Output mode
Input mode
Output mode
PM2:
OPAMP0E: Bit 7 of operational amplifier 0 control register (AMP0M)
PGAEN:
ADS:
PM2 Register
Table 4-10. Setting Functions of P21/ANI1/AMP0OUT/PGAIN Pin
REF
Table 4-11. Setting Functions of P23/ANI3 to P27/ANI7 Pins
A/D port configuration register 0
Port mode register 2
Bit 6 of AMP0M
Analog input channel specification register
pin the same potential as the V
Input mode
Output mode
Input mode
Output mode
0
1
0
1
0
0
1
PM2 Register
OPAMP0E bit
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 4 PORT FUNCTIONS
0
1
0
Selects ANIn.
Does not select ANIn.
Selects ANIn.
Does not select ANIn.
Selects ANIn.
Does not select ANIn.
ADS Register(n = 3 to 7)
PGAEN bit
Selects ANI1.
Does not select ANI1.
Selects ANI1.
Does not select ANI1.
Selects ANI1.
Does not select ANI1.
Selects PGAIN.
Does not select PGAIN.
Selects ANI1.
Does not select ANI1.
DD
pin when port 2 is used as a digital port.
ADS Register
Setting prohibited
Digital input
Setting prohibited
Digital output
Analog input (to be converted into
digital signals)
Analog input (not to be converted
into digital signals)
Setting prohibited
P23/ANI3 to P27/ANI7 Pins
Setting prohibited
Digital input
Setting prohibited
Setting prohibited
Digital output
Setting prohibited
Analog input (to be converted
into digital signals)
Analog input (not to be converted
into digital signals)
PGA input (to be converted into
digital signals)
PGA input (not to be converted
into digital signals)
Operational amplifier output (to
be converted into digital signals)
Operational amplifier output (not
to be converted into digital
signals)
Setting prohibited
P21/ANI1/AMP0OUT/PGAIN Pin
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