UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 449

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.1 Functions of Serial Interface IICA
Serial interface IICA is mounted onto all 78K0/Kx2-L microcontroller products.
Serial interface IICA has the following three modes.
(1) Operation stop mode
(2) I
(3) Wakeup mode
Figure 15-1 shows a block diagram of serial interface IICA.
This mode is used when serial transfers are not performed. It can therefore be used to reduce power
consumption.
This mode is used for 8-bit data transfers with several devices via two lines: a serial clock (SCLA0) line and a
serial data bus (SDAA0) line.
This mode complies with the I
“transfer direction specification”, “data”, and “stop condition” data to the slave device, via the serial data bus.
The slave device automatically detects these received status and data by hardware. This function can simplify
the part of application program that controls the I
Since the SCLA0 and SDAA0 pins are used for open drain outputs, IICA requires pull-up resistors for the serial
clock line and the serial data bus line.
The STOP mode can be released by generating an interrupt request signal (INTIICA0) when an extension
code from the master device or a local address has been received while in STOP mode. This can be set by
using the WUP bit of IICA control register 1 (IICACTL1).
2
C bus mode (multimaster supported)
CHAPTER 15 SERIAL INTERFACE IICA
2
C bus format and the master device can generated “start condition”, “address”,
Preliminary User’s Manual U19111EJ2V1UD
2
C bus.
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