UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 317
UPD78F0550MA-FAA-AX
Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet
1.UPD78F0550MA-FAA-AX.pdf
(734 pages)
Specifications of UPD78F0550MA-FAA-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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8-bit timer counter Hn
<1> The count operation is enabled by setting the TMHEn bit to 1. The count clock starts counting no more than
<2> When the value of the 8-bit timer counter Hn matches the value of the CMP0n register, the value of the timer
<3> If the TMHEn bit is cleared to 0 while timer H is operating, the INTTMHn signal and TOHn output are set to
Remarks 1. 01H
Count clock
1 clock after the operation is enabled.
counter is cleared, and the level of the TOHn output is inverted. In addition, the INTTMHn signal is output at
the rising edge of the count clock.
the default level. If they are already at the default level before the TMHEn bit is cleared to 0, then that level
is maintained.
INTTMHn
CMP0n
TMHEn
2. 78K0/KY2-L, 78K0/KA2-L: n = 1
TOHn
78K0/KB2-L, 78K0/KC2-L: n = 0, 1
Figure 8-11. Timing of Interval Timer/Square-Wave Output Operation (1/2)
<1>
N
00H
Count start
FEH
(a) Basic operation (Operation When 01H
01H
CHAPTER 8 8-BIT TIMERS H0 AND H1
Preliminary User’s Manual U19111EJ2V1UD
match interrupt occurrence,
8-bit timer counter Hn clear
Level inversion,
N
N
<2>
Clear
00H
01H
Interval time
CMP0n
FEH)
match interrupt occurrence,
8-bit timer counter Hn clear
Level inversion,
N
<2>
Clear
00H
01H 00H
<3>
317
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