UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 212

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
5.6.9 Conditions before clock oscillation is stopped
conditions before the clock oscillation is stopped.
212
Internal high-speed
oscillation clock
X1 clock
External main system clock
Internal high-speed
oscillation clock
X1 clock
External main system clock
XT1 clock
External subsystem clock
The following lists the register flag settings for stopping the clock oscillation (disabling external clock input) and
Table 5-12. Conditions Before the Clock Oscillation Is Stopped and Flag Settings (78K0/KC2-L)
Clock
Clock
Table 5-11. Conditions Before the Clock Oscillation Is Stopped and Flag Settings
MCS = 1
(The CPU is operating on the high-speed system clock)
MCS = 0
(The CPU is operating on the internal high-speed oscillation clock)
MCS = 1 or CLS = 1
(The CPU is operating on a clock other than the internal high-speed
oscillation clock)
MCS = 0 or CLS = 1
(The CPU is operating on a clock other than the high-speed system clock)
CLS = 0
(The CPU is operating on a clock other than the subsystem clock)
(78K0/KY2-L, 78K0/KA2-L, and 78K0/KB2-L)
Conditions Before Clock Oscillation Is Stopped
Conditions Before Clock Oscillation Is Stopped
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 5 CLOCK GENERATOR
(External Clock Input Disabled)
(External Clock Input Disabled)
RSTOP = 1
MSTOP = 1
RSTOP = 1
MSTOP = 1
OSCSELS = 0
Flag Settings of SFR
Flag Settings of SFR
Register
Register

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