UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 409

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
INTST6
Remark LIN stands for Local Interconnect Network and is a low-speed (1 to 20 kbps) serial communication
Notes 1.
Remark The interval between each field is controlled by software.
Figures 14-1 and 14-2 outline the transmission and reception operations of LIN.
LIN Bus
(output)
Note 3
TX6
2.
3.
protocol intended to aid the cost reduction of an automotive network.
LIN communication is single-master communication, and up to 15 slaves can be connected to one
master.
The LIN slaves are used to control the switches, actuators, and sensors, and these are connected to the
LIN master via the LIN network.
Normally, the LIN master is connected to a network such as CAN (Controller Area Network).
In addition, the LIN bus uses a single-wire method and is connected to the nodes via a transceiver that
complies with ISO9141.
In the LIN protocol, the master transmits a frame with baud rate information and the slave receives it and
corrects the baud rate error. Therefore, communication is possible when the baud rate error in the slave
is 15% or less.
The wakeup signal frame is substituted by 80H transmission in the 8-bit mode.
The sync break field is output by hardware. The output width is the bit length set by bits 4 to 2 (SBL62
to SBL60) of asynchronous serial interface control register 6 (ASICL6) (refer to 14.4.2 (2) (h) SBF
transmission).
INTST6 is output on completion of each transmission. It is also output when SBF is transmitted.
signal frame
8 bits
Wakeup
Note 1
Figure 14-1. LIN Transmission Operation
CHAPTER 14 SERIAL INTERFACE UART6
13-bit
transmission
break field
Preliminary User’s Manual U19111EJ2V1UD
Sync
Note 2
SBF
transmission
Sync field
55H
transmission
Identifier
Data
field
transmission
Data field
Data
transmission
Data field Checksum
Data
transmission
field
Data
409

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