UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 729

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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C.1 Major Revisions in This Edition
Throughout
CHAPTER 1 OUTLINE
pp. 17, 18
p. 19
pp. 21, 22
pp. 23, 24
pp. 28 to 31
pp. 32, 33
CHAPTER 2 PIN FUNCTIONS
pp. 39, 42
p. 48
p. 56
p. 59
p. 60
CHAPTER 3 CPU ARCHITECTURE
p. 72
pp. 84, 86
CHAPTER 4 PORT FUNCTIONS
p. 103
p. 104
p. 106
p. 110
p. 110
pp. 112, 113
pp. 114, 115
pp. 116, 117
p. 122
p. 135
p. 136
p. 145
p. 157
Remark “Classification” in the above table classifies revisions as follows.
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note,
(d): Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Modification of P60 and P61 pins alternate function in the 78K0/KY2-L and 78K0/KA2-L
1.1 Features
Modification of 1.2 Ordering Information
Modification of pin configurations in 1.3.1 78K0/KY2-L and 1.3.2 78K0/KA2-L
Modification of 1.3.3 78K0/KB2-L and 1.3.4 78K0/KC2-L
Modification of 1.4.1 78K0/KY2-L to 1.4.4 78K0/KC2-L
Modification of 1.5 Outline of Functions
Modification of 2.1.3 78K0/KB2-L and 2.1.4 78K0/KC2-L
Modification of table of pins in 2.2.2 P10 to P17 (port 1)
Modification of 2.2.10 (b) IC
Modification of Table 2-4 Pin I/O Circuit Types (78K0/KB2-L)
Modification of Table 2-5 Pin I/O Circuit Types (78K0/KC2-L) (1/2)
Modification of Table 3-4 Vector Table
Addition of 8-bit A/D conversion result register L and modification of serial I/O shift register 10,
serial operation mode register 10, serial clock selection register 10, and transmit buffer register 10
in Table 3-6 Special Function Register List
Modification of Table 4-4 Port Functions (78K0/KB2-L)
Modification of Table 4-5 Port Functions (78K0/KC2-L) (1/2)
Modification of Note in Table 4-6 Port Configuration
Modification of table of pins and description in 4.2.2 Port 1
Modification of Table 4-7 Setting Functions of P10/ANI8/AMP1-, P12/ANI10/AMP1+ Pins
Modification of Figure 4-4 Block Diagram of P10
Modification of Figure 4-5 Block Diagram of P11
Modification of Figure 4-6 Block Diagram of P12
Modification of Table 4-9 Setting Functions of P20/ANI0/AMP0-, P22/ANI2/AMP0+ Pins
Modification of Figure 4-19 Block Diagram of P40
Addition of Figure 4-20 Block Diagram of P41 and modification of Figure 4-21 Block Diagram
of P42
Modification of Figure 4-27 Block Diagram of P120 (2/2)
Modification of Note in 4.3 (7) A/D port configuration registers 0, 1 (ADPC0, ADPC1)
Modification of description of low power consumption
Modification of description and table of serial interface
Modification of 10-bit resolution A/D conversion
APPENDIX C REVISION HISTORY
Preliminary User’s Manual U19111EJ2V1UD
Description
Classification
(a, b)
(b, c)
(b, c)
(b)
(d)
(b)
(b)
(b)
(b)
(b)
(c)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(c)
(b)
(b)
(b)
(c)
(c)
(c)
(c)
(b)
(1/5)
729