UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 445

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UPD78F0550MA-FAA-AX

Manufacturer Part Number
UPD78F0550MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0550MA-FAA-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
12
Core Processor
78K/0
Program Memory Type
FLASH
Ram Size
384 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Connectivity
I²C, LIN, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
Renesas
Quantity:
800
Part Number:
UPD78F0550MA-FAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
(2) Error of baud rate
(3) Example of setting baud rate
Remark TPS63 to TPS60: Bits 3 to 0 of clock selection register 6 (CKSR6) (setting of base clock (f
The baud rate error can be calculated by the following expression.
Cautions 1. Keep the baud rate error during transmission to within the permissible error range at the
Example: Frequency of base clock = 10 MHz = 10,000,000 Hz
Error (%) =
k:
f
ERR:
PRS
115200
153600
312500
625000
19200
24000
31250
38400
48000
76800
2. Make sure that the baud rate error during reception satisfies the range shown in (4)
Baud
[bps]
1200
2400
4800
9600
Rate
300
600
Set value of MDL67 to MDL60 bits of BRGC6 register = 00100001B (k = 33)
Target baud rate = 153600 bps
Baud rate = 10 M / (2
Error = (151515/153600
:
reception destination.
Permissible baud rate range during reception.
Actual baud rate (baud rate with error)
Desired baud rate (correct baud rate)
= 1.357 [%]
TPS63-
TPS60
8H
7H
6H
5H
4H
3H
2H
1H
1H
1H
0H
0H
0H
= 10000000 / (2
f
PRS
13
13
13
13
13
13
13
21
16
13
21
13
9
k
= 2.0 MHz
Value set by MDL67 to MDL60 bits of baud rate generator control register 6
(BRGC6) (k = 4, 5, 6, ..., 255)
Peripheral hardware clock frequency
Baud rate error
Calculated
111111
Table 14-5. Set Data of Baud Rate Generator
19231
23810
31250
38462
47619
76923
Value
1202
2404
4808
9615
301
601
CHAPTER 14 SERIAL INTERFACE UART6
33)
Preliminary User’s Manual U19111EJ2V1UD
1)
ERR
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
[%]
0.79
0.79
3.55
33) = 151,515 [bps]
0
100
TPS63-
TPS60
7H
6H
5H
4H
3H
2H
1H
3H
4H
0H
2H
0H
1H
1H
0H
0H
f
PRS
65
65
65
65
65
65
65
13
65
13
33
11
k
5
8
8
4
= 5.0 MHz
1
Calculated
113636
156250
312500
625000
19231
24038
31250
38462
48077
75758
Value
1202
2404
4808
9615
301
601
100 [%]
ERR
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
1.73
[%]
1.36
1.36
0
0
0
TPS63-
TPS60
8H
7H
6H
5H
4H
3H
2H
4H
5H
1H
3H
0H
0H
0H
1H
1H
f
PRS
65
65
65
65
65
65
65
13
65
13
65
43
33
5
8
4
k
= 10.0 MHz
Calculated
116279
151515
312500
625000
19231
24038
31250
38462
48077
76923
Value
1202
2404
4808
9615
301
601
ERR
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.94
[%]
1.36
0
0
0
XCLK6
))
445

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