UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 400

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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13.3 Registers Used in Operational Amplifier
(1) Operational amplifier 0 control register (AMP0M), operational amplifier 1 control register (AMP1M)
400
Address: FF60H After reset: 00H R/W
AMP0M
The operational amplifiers use the following three registers.
Cautions 1. When using the PGA mode, use the ADPC0 register to select the PGAIN/AMP0OUT/ANI1/P21
Remark The output of operational amplifier 0 is amplified by the PGA by setting OPAMP0E = PGAEN = 1.
Symbol
Remark Products with operational amplifier of the 78K0/KY2-L and 78K0/KA2-L:
These registers control the operations of operational amplifiers 0 and 1.
AMP0M and AMP1M can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Operational amplifier 0 control register (AMP0M), operational amplifier 1 control register (AMP1M)
A/D port configuration registers 0 and 1 (ADPC0, ADPC1)
Port mode registers 1 and 2 (PM1, PM2)
2. When
3. When using as digital inputs the pins of port 2, which are not used with the operational
OPAMP0E
OPAMP0E
AMP0VG1
Products with operational amplifier of the 78K0/KB2-L and 78K0/KC2-L:
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pin as an analog input.
AMP0OUT/PGAIN/ANI1/P21, AMP0-/ANI0/P20, and AMP0+/ANI2/P22 pins as analog inputs.
amplifier 0, when the operational amplifier 0 is used, make sure that the input levels are
fixed.
0
0
1
1
0
0
1
1
Figure 13-2. Format of Operational Amplifier 0 Control Register (AMP0M)
using
AMP0VG0
PGAEN
PGAEN
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0
1
0
1
0
1
0
1
the
(Products with Operational Amplifier Only)
CHAPTER 13 OPERATIONAL AMPLIFIERS
Stops operational amplifier 0 operation
Enables operational amplifier 0 (PGA mode only) operation
Enables operational amplifier 0 (single AMP mode only) operation
Enables operational amplifier 0 (simultaneous operation in the PGA and single AMP
modes) operation
Preliminary User’s Manual U19111EJ2V1UD
single
4
8
16
32
5
0
AMP
PGA mode of operational amplifier 0 gain selection
4
0
mode,
Operational amplifier 0 operation control
use
3
0
the
ADPC0
2
0
Operational amplifier 0 is
mounted.
Operational amplifiers 0 and
1 are mounted.
register
AMP0VG1
1
to
AMP0VG0
select
0
the