UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 344

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

344
Caution If writing is performed to the RTCC1 register with a 1-bit manipulation instruction, the RIFG
Remark Fixed-cycle interrupts and alarm match interrupts use the same interrupt source (INTRTC). When
This flag indicates the status of generation of the constant-period interrupt. When the constant-period interrupt is
generated, it is set to “1”.
This flag is cleared when “0” is written to it. Writing “1” to it is invalid.
This status flag indicates whether the setting of RWAIT is valid.
Before reading or writing the counter value, confirm that the value of this flag is 1.
This bit controls the operation of the counter.
Be sure to write “1” to it to read or write the counter value.
Because RSUBC continues operation, complete reading or writing of it in 1 second, and clear this bit back to 0.
When RWAIT = 1, it takes up to 1 clock (32.768 kHz) until the counter value can be read or written.
If RSUBC overflows when RWAIT = 1, it counts up after RWAIT = 0. If the second count register is written,
however, it does not count up because RSUBC is cleared.
RWAIT
RWST
RIFG
flag and WAFG flag may be cleared. Therefore, to perform writing to the RTCC1 register, be
sure to use an 8-bit manipulation instruction. To prevent the RIFG flag and WAFG flag from
being cleared during writing, disable writing by setting 1 to the corresponding bit. If the RIFG
flag and WAFG flag are not used and the value may be changed, the RTCC1 register may be
written by using a 1-bit manipulation instruction.
using these two types of interrupts at the same time, which interrupt occurred can be judged by
checking the fixed-cycle interrupt status flag (RIFG) and the alarm detection status flag (WAFG)
upon INTRTC occurrence.
Figure 10-4. Format of Real-Time Counter Control Register 1 (RTCC1) (2/2)
0
1
0
1
0
1
Constant-period interrupt is not generated.
Constant-period interrupt is generated.
Counter is operating.
Mode to read or write counter value
Sets counter operation.
Stops SEC to YEAR counters. Mode to read or write counter value
CHAPTER 10 REAL-TIME COUNTER
Preliminary User’s Manual U19111EJ2V1UD
Constant-period interrupt status flag
Wait status flag of real-time counter
Wait control of real-time counter