UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 370

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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12.2 Configuration of A/D Converter
(1) ANI0 to ANI10 pins
(2) AMP0OUT, PGAIN pins (products with operational amplifier only)
(3) AMP1OUT pin (products with operational amplifier of 78K0/KB2-L and 78K0/KC2-L only)
(4) Sample & hold circuit
(5) Comparison voltage generator
(6) A/D voltage comparator
(7) Successive approximation register (SAR)
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The A/D converter includes the following hardware.
Remark A/D converter analog input pins differ depending on products.
These are the analog input pins of the 11-channel A/D converter. They input analog signals to be converted into
digital signals. Pins other than the one selected as the analog input pin can be used as I/O port pins.
AMP0OUT is the output pin of operational amplifier 0.
PGAIN is the input pin of PGA (Programmable gain amplifier).
They function alternately as ANI1. The A/D converter can perform A/D conversion by selecting the output signal
of operational amplifier 0 or PGA as the analog input source.
AMP1OUT is the output pin of operational amplifier 1.
This functions alternately as ANI9. The A/D converter can perform A/D conversion by selecting the output signal
of operational amplifier 1 as the analog input source.
The sample & hold circuit samples each of the analog input voltages sequentially sent from the input circuit, and
sends them to the A/D voltage comparator. This circuit also holds the sampled analog input voltage during A/D
conversion.
The comparison voltage generator is connected between AV
compared with an analog input. The operation of the comparison voltage generator is enabled or disabled by
using the ADCS bit (bit 7 of the ADM0 register). The power consumption can be reduced by stopping the
operation of the comparison voltage generator when A/D conversion is not performed.
The A/D voltage comparator compares the sampled voltage values with the output voltage of the comparison
voltage generator. The operation of the A/D voltage comparator is enabled or disabled by using the ADCE bit (bit
0 of the ADM0 register). The power consumption can be reduced by stopping the operation of the A/D voltage
comparator when A/D conversion is not performed.
The SAR register is a 10-bit register that sets a result compared by the A/D voltage comparator, 1 bit at a time
starting from the most significant bit (MSB).
If data is set in the SAR register all the way to the least significant bit (LSB) (end of A/D conversion), the contents
of the SAR register (conversion results) are held in the A/D conversion result register (ADCR, ADCRH).
78K0/KY2-L:
78K0/KA2-L:
78K0/KB2-L:
78K0/KC2-L:
ANI0 to ANI3
ANI0 to ANI5
ANI0 to ANI3, ANI8 to ANI10
ANI0 to ANI10
Preliminary User’s Manual U19111EJ2V1UD
CHAPTER 12 A/D CONVERTER
REF
and AV
SS
, and generates a voltage to be