UPD78F0550MA-FAA-AX Renesas Electronics America, UPD78F0550MA-FAA-AX Datasheet - Page 629

• Manufacturer Part Number: UPD78F0550MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0550MA-FAA-AX

• Package / Case: *
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 10MHz
• Number Of I /o: 12
• Core Processor: 78K/0
• Program Memory Type: FLASH
• Ram Size: 384 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Peripherals: LVD, POR, PWM, WDT
• Connectivity: I²C, LIN, UART/USART
• Core Size: 8-Bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.4.1 When used as reset
(1) When detecting level of supply voltage (V
(a) When LVI default start function stopped is set (LVISTART = 0)
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Clear bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 0 (detects level of supply voltage
<3> Set the LVI detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level
<4> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<5> Use software to wait for an operation stabilization time (10 s (MAX.)).
<6> Wait until it is checked that (supply voltage (V
<7> Set bit 1 (LVIMD) of LVIM to 1 (generates reset when the level is detected).
Figure 22-5 shows the timing of the internal reset signal generated by the low-voltage detector. The numbers
in this timing chart correspond to <1> to <7> above.
When using 8-bit memory manipulation instruction:
When using 1-bit memory manipulation instruction:
When starting operation
When stopping operation
Either of the following procedures must be executed.
Cautions 1. Be sure to execute <1>. When LVIMK = 0, an interrupt may occur immediately after the
Write 00H to LVIM.
Clear LVIMD to 0 and then LVION to 0.
(V
selection register (LVIS).
DD
)) (default value).
2. If supply voltage (V
processing in <4>.
reset signal is not generated.
CHAPTER 22 LOW-VOLTAGE DETECTOR
Preliminary User’s Manual U19111EJ2V1UD
DD
)
DD
LVI detection voltage (V
)
DD
)
LVI detection voltage (V
LVI
) when LVIMD is set to 1, an internal
LVI
)) by bit 0 (LVIF) of LVIM.
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