UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 146

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

144
(2) TMPn control register 1 (TPnCTL1)
Notes 1. This bit can only be set in TMP1. Be sure to clear bit 7 of TMP0, TMP2, and TMP3 to 0. For details
The TPnCTL1 register is an 8-bit register that controls the TMPn operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
2. This bit can only be set in TMP0, TMP2, and TMP3. Be sure to clear bit 6 of TMP1 to 0.
3. This bit can only be set in TMP0 and TMP2. Be sure to clear bit 5 of TMP1 and TMP3 to 0.
4. Set the valid edge selection of capture trigger input (TIPk0 pin) to “No edge detection”.
m = 0, 2, 3
of tuning operation mode, see CHAPTER 9 MOTOR CONTROL FUNCTION.
(n = 0 to 3
TPnCTL1
k = 0, 2)
After reset: 00H
TP1SYE
TPmEST
TP1SYE
TPkEEE
TMP1 can be used only as an A/D conversion start trigger factor of A/D converters
0 and 1 during the tuning operation. In the tuning operation mode, this bit always
operates in synchronization with TMQ1.
Read value of the TPmEST bit is always 0.
The TPkEEE bit selects whether counting is performed with the internal count clock
or the valid edge of the external event count input.
0
1
0
1
0
1
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
7
Note 1
Note 1
Note 3
Note 2
TPmEST
Disable operation with external event count input (TIPk0 pin).
(Perform counting with the count clock selected by the
TPkCTL0.TPkCKS0 to TPkCTL0.TPkCKS2 bits.)
TMP1 single mode
Tuning operation mode (see 9.4.5)
Generate a valid signal for external trigger input.
• In one-shot pulse output mode:
• In external trigger pulse output mode:
Enable operation with external event count input (TIPk0 pin)
(Perform counting at the valid edge of the external event count input
signal.)
R/W
A PWM waveform is output with writing 1 to the TPmEST bit as the
trigger.
A one-shot pulse is output with writing 1 to the TPmEST bit as the
trigger.
6
Note 2
User’s Manual U17716EJ2V0UD
Address: TP0CTL1 FFFFF641H, TP1CTL1 FFFFF661H,
TPkEEE
5
Note 3
TP2CTL1 FFFFF681H, TP3CTL1 FFFFF6A1H
Operation mode selection
4
0
Software trigger control
Count clock selection
−
3
0
TPnMD2 TPnMD1 TPnMD0
2
1
Note 4
.
0
(1/2)