UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 480
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UPD70F3714GC-8BS-A
Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet
1.UPD70F3713GC-8BS-A.pdf
(674 pages)
Specifications of UPD70F3714GC-8BS-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(2) UARTAn control register 1 (UAnCTL1)
(3) UARTAn control register 2 (UAnCTL2)
Note This register can be rewritten only when the UAnPWR bit = 0 or the UAnTXE bit = UAnRXE bit = 0.
Remark
For details, see 12.6 (2) UARTAn control register 1 (UAnCTL1).
For details, see 12.6 (3) UARTAn control register 2 (UAnCTL2).
However, setting any or all of the UAnPWR, UAnTXE, and UAnRXE bits to 1 at the same time is
possible.
For details of parity, see 12.5.6 Parity types and operations.
UAnCL
UAnSL
UAnPS1
UAnDIR
If “Reception with 0 parity” is selected during reception, a parity check is not performed.
Therefore, since the UAnSTR.UAnPE bit is not set, no error interrupt due to a parity
error is output.
Only the first bit of the receive data stop bits is checked, regardless of the value of
the UAnSL bit.
0
1
0
1
0
1
0
0
1
1
CHAPTER 12 ASYNCHRONOUS SERIAL INTERFACE A (UARTA)
Note
Note
Note
Note
UAnPS0
7 bits
8 bits
1 bit
2 bits
MSB-first transfer
LSB-first transfer
Specification of data character length of 1 frame of transmit/receive data
0
1
0
1
Note
Parity selection during transmission Parity selection during reception
No parity output
0 parity output
Odd parity output
Even parity output
Specification of length of stop bit for transmit data
User’s Manual U17716EJ2V0UD
Transfer direction selection
Reception with no parity
Reception with 0 parity
Odd parity check
Even parity check
(2/2)
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