UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 580
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UPD70F3714GC-8BS-A
Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet
1.UPD70F3713GC-8BS-A.pdf
(674 pages)
Specifications of UPD70F3714GC-8BS-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
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Price
Company:
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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14.9 Periods in Which CPU Does Not Acknowledge Interrupts
acknowledged between an interrupt request non-sample instruction and the next instruction (interrupt is held pending).
14.10 Caution
interrupt, which are alternate functions, do not occur (n = 0 to 7).
578
The CPU acknowledges an interrupt while an instruction is being executed.
The interrupt request non-sample instructions are as follows.
• EI instruction
• DI instruction
• LDSR reg2, 0x5 instruction (for PSW)
• Store instruction for the command register (PRCMD) and command register 2 (PRCMD2).
• Store instructions or bit manipulation instructions excluding tst1 instruction for the following registers.
Remark
Note that if a port is set to external interrupt request input (INTPn), the timer/counter interrupt and A/D converter
• Interrupt-related registers:
• Power save control register (PSC)
• Internal memory size setting register (IMS)
Interrupt control register (xxICn) and interrupt mask registers 0 to 3 (IMR0 to IMR3)
xx: Identification name of each peripheral unit (see Table 14-2)
n: Peripheral unit number (see Table 14-2)
CHAPTER 14 INTERRUPT/EXCEPTION PROCESSING FUNCTION
User’s Manual U17716EJ2V0UD
However, no interrupt will be
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