UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 274

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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(g) TMQn capture/compare registers 1 to 3 (TQnCCR1 to TQnCCR3)
The TQnCCR1 to TQnCCR3 registers are not used in the interval timer mode, but the set values of the
TQnCCR1 to TQnCCR3 registers are transferred to the CCR1 to CCR3 buffer registers. When the count
value of the 16-bit counter matches the value of the CCR1 to CCR3 buffer registers, the TOQ01 to
TOQ03 pin outputs are inverted and the compare match interrupt request signals (INTTQnCC1 to
INTTQnCC3) are generated.
When the TQnCCR1 to TQnCCR3 registers are not used, it is recommended to set their values to
FFFFH.
TQnCCIC3.TQnCCMK3).
Remarks 1. TMQ0 I/O control register 1 (TQ0IOC1) and TMQn option register 0 (TQnOPT0) are not
Figure 7-10. Register Setting for Interval Timer Mode Operation (3/3)
2. n = 0, 1
Also mask the registers by the interrupt mask flags (TQnCCIC1.TQnCCMK1 to
used in the interval timer mode.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
User’s Manual U17716EJ2V0UD