UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 241
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UPD70F3714GC-8BS-A
Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet
1.UPD70F3713GC-8BS-A.pdf
(674 pages)
Specifications of UPD70F3714GC-8BS-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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7.2
7.3
The TMQn functions that can be realized differ from one channel to another, as shown in the table below (n = 0, 1).
Notes 1. This is connected to TMQOP1. For details, see CHAPTER 9 MOTOR CONTROL FUNCTION.
TMQn includes the following hardware.
Functions
Configuration
2. Can be realized only by software trigger. No external trigger input pins are provided.
6-phase PWM output
Interval timer
External event counter
External trigger pulse output
One-shot pulse output
PWM output
Free-running timer
Pulse width measurement
Remark
Timer register
Registers
Timer input
Timer output
Control registers
Item
n = 0, 1
Function
Note 1
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
16-bit counter × 1
TMQn counter read buffer register (TQnCNT): Total of 2
TMQn capture/compare registers 0 to 3 (TQnCCR0 to TQnCCR3): Total of 8
CCR0 to CCR3 buffer registers: Total of 8
Total of 5 (TIQ00 to TIQ03, EVTQ0 pins)
Total of 6 (TOQ00, TOQ01/TOQH01, TOQ02, TOQ03/TOQH02, TOQH03,
TOQ10 pins)
TMQn control registers 0, 1 (TQnCTL0, TQnCTL1)
TMQn I/O control register 0 (TQnIOC0)
TMQ0 I/O control registers 1, 2 (TQ0IOC1, TQ0IOC2)
TMQn option register 0 (TQnOPT0)
Table 7-3. TMQn Configuration
Table 7-2. TMQn Functions
User’s Manual U17716EJ2V0UD
Configuration
TMQ0
√
√
Note 2
Note 2
√
√
√
√
√
×
TMQ1
√
√
×
×
×
×
√
×
239
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