UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 174
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UPD70F3714GC-8BS-A
Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet
1.UPD70F3713GC-8BS-A.pdf
(674 pages)
Specifications of UPD70F3714GC-8BS-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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172
(c) Notes on rewriting TPnCCR0 register
If the value of the TPnCCR0 register is rewritten to a smaller value during counting, the 16-bit counter may
overflow. When an overflow may occur, stop counting and then change the set value.
Remarks 1. Interval time (1):
If the value of the TPnCCR0 register is changed from D
less than D
has been rewritten. Consequently, the value of the 16-bit counter that is compared is D
Because the count value has already exceeded D
overflows, and then counts up again from 0000H. When the count value matches D
signal is generated and the output of the TOP00 pin is inverted.
Therefore, the INTTPnCC0 signal may not be generated at the interval time “(D
or “(D
+ 1) × Count clock cycle”.
INTTPnCC0 signal
2
TPnCCR0 register
TOP00 pin output
+ 1) × Count clock cycle” originally expected, but may be generated at an interval of “(10000H + D
16-bit counter
2. n = 0 to 3
1
TP0OL0 bit
, the count value is transferred to the CCR0 buffer register as soon as the TPnCCR0 register
TPnCE bit
Interval time (NG): (10000H + D
Interval time (2):
FFFFH
0000H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
L
Interval time (1)
(D
(D
User’s Manual U17716EJ2V0UD
1
2
+ 1) × Count clock cycle
+ 1) × Count clock cycle
D
1
D
1
2
+ 1) × Count clock cycle
D
2
Interval time (NG)
2
, however, the 16-bit counter counts up to FFFFH,
D
1
1
to D
2
while the count value is greater than D
D
2
D
2
Interval
time (2)
D
2
1
+ 1) × Count clock cycle”
2
.
2
, the INTTPnCC0
2
but
2
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