UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 221
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UPD70F3714GC-8BS-A
Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet
1.UPD70F3713GC-8BS-A.pdf
(674 pages)
Specifications of UPD70F3714GC-8BS-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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TPkIOC2
TPnOPT0
(e) TMPk I/O control register 2 (TPkIOC2)
(f) TMPn option register 0 (TPnOPT0)
(g) TMPn counter read buffer register (TPnCNT)
(h) TMPn capture/compare registers 0 and 1 (TPnCCR0 and TPnCCR1)
Note Set the valid edge selection of the unused alternate external input signals to “No edge detection”.
The value of the 16-bit counter can be read by reading the TPnCNT register.
These registers function as capture registers or compare registers depending on the setting of the
TPkOPT0.TPkCCSa bit.
When the registers function as capture registers, they store the count value of the 16-bit counter when
the valid edge input to the TIPka pin is detected.
When the registers function as compare registers and when D
INTTPnCCa signal is generated when the counter reaches (D
TOP00 and TOPm1 pins are inverted.
Remark
0
0
n = 0 to 3, m = 0, 2, 3, k = 0, 2, a = 0, 1
Figure 6-38. Register Setting in Free-Running Timer Mode (2/2)
0
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
TPkCCS1
0/1
0
TPkCCS0
0
0/1
User’s Manual U17716EJ2V0UD
TPkEES1
0/1
0
TPkEES0 TPkETS1 TPkETS0
0/1
0
0
0
a
a
is set to the TPnCCRa register, the
+ 1), and the output signals of the
TPnOVF
0
0/1
Select valid edge of external
event count input (TIPk0 pin)
Overflow flag
Specifies if TPkCCR0
register functions as
capture or compare register
0: Compare register
1: Capture register
Specifies if TPkCCR1
register functions as
capture or compare register
0: Compare register
1: Capture register
219
Note
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