UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 275

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UPD70F3714GC-8BS-A

Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3714GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
<R>
<R>
(1) Interval timer mode operation flow
<1> Count operation start flow
<2> Count operation stop flow
Note Enable setting of the TQ0EES1 and TQ0EES0 bits only when timer output (TOQ00 to TOQ03) is
Remark
INTTQnCC0 signal
(TQnCKS0 to TQnCKS2 bits)
TQnCCR0 register
TOQn0 pin output
used. In this case, set the TQ0CCR0 to TQ0CCR3 registers to the same value.
TQ0IOC2 register
Register initial setting
16-bit counter
TQnCTL1 register,
TQnCCR0 register
TQnIOC0 register,
TQnCTL0 register
n = 0, 1
TQnCE bit = 1
TQnCE bit = 0
TQnCE bit
Figure 7-11. Software Processing Flow in Interval Timer Mode
START
STOP
FFFFH
0000H
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Note
,
<1>
User’s Manual U17716EJ2V0UD
Initial setting of these registers is performed
before setting the TQnCE bit to 1.
The TQnCKS0 to TQnCKS2 bits can be
set at the same time when counting has
been started (TQnCE bit = 1).
The counter is initialized and counting is
stopped by clearing the TQnCE bit to 0.
The output level of the TOQn0 pin is as
specified by the TQnIOC0 register.
D
0
D
0
D
0
D
0
<2>
273

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