UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 195

• Manufacturer Part Number: UPD70F3714GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3714GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

In order to transfer data from the TPmCCRa register to the CCRa buffer register, the TPmCCR1 register
must be written.
To change both the cycle and active level width of the PWM waveform at this time, first set the cycle to the
TPmCCR0 register and then set the active level width to the TPmCCR1 register.
To change only the cycle of the PWM waveform, first set the cycle to the TPmCCR0 register, and then
write the same value (same as preset value of the TPmCCR1 register) to the TPmCCR1 register.
To change only the active level width (duty factor) of the PWM waveform, only the TPmCCR1 register has
to be set.
After data is written to the TPmCCR1 register, the value written to the TPmCCRa register is transferred to
the CCRa buffer register in synchronization with clearing of the 16-bit counter, and is used as the value
compared with the 16-bit counter.
To write the TPmCCR0 or TPmCCR1 register again after writing the TPmCCR1 register once, do so after
the INTTPmCC0 signal is generated. Otherwise, the value of the CCRa buffer register may become
undefined because the timing of transferring data from the TPmCCRa register to the CCRa buffer register
conflicts with writing the TPmCCRa register.
Remark
m = 0, 2, 3
a = 0, 1
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
User’s Manual U17716EJ2V0UD
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