UPD70F3714GC-8BS-A Renesas Electronics America, UPD70F3714GC-8BS-A Datasheet - Page 445
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UPD70F3714GC-8BS-A
Manufacturer Part Number
UPD70F3714GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet
1.UPD70F3713GC-8BS-A.pdf
(674 pages)
Specifications of UPD70F3714GC-8BS-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3714GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(2) Operation mode
There are four operation modes in which the ANIn0 to ANIn3 pins are set: continuous select mode, continuous
scan mode, one-shot select mode, and one-shot scan mode. The continuous select mode and one-shot select
mode have sub-modes that consist of 1-buffer mode and 4-buffer mode.
ADAnM0 and ADAnM2 registers.
Remark
(a) Continuous select mode
In this mode, the analog input pin (ANInm) specified by the ADAnS register is A/D converted continuously.
The conversion results are stored in the A/Dn conversion result register (ADAnCRm) corresponding to the
ANInm pin. In this mode, the 1-buffer mode and 4-buffer mode are provided for storing the A/D conversion
results.
• 1-buffer mode
In this mode, the voltage of the analog input pin (ANInm) specified by the ADAnS register is A/D
converted. The conversion results are stored in the ADAnCRm register corresponding to the ANInm
pin. The ANInm pin and the ADAnCRm register correspond one to one, and an A/Dn conversion end
interrupt request signal (INTADn) is generated each time one A/D conversion ends.
After the end of A/D conversion, the conversion is repeated again unless the ADAnM0.ADAnCE bit is
cleared to 0.
Remark
n = 0, 1
n = 0, 1
m= 0 to 3
CHAPTER 11 A/D CONVERTERS 0 AND 1
User’s Manual U17716EJ2V0UD
These modes are set by the
443
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