R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 122

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Instruction Descriptions
6.3.10
Format
BXOR.B #imm3, @(disp12,Rn)
Description
Exclusive-ORs a specified bit in memory at the address indicated by (disp + Rn) with the T bit,
and stores the result in the T bit. The bit number is specified by 3-bit immediate data. With this
instruction, data is read from memory as a byte unit.
Rev. 3.00 Jul 08, 2005 page 106 of 484
REJ09B0051-0300
BXOR.B #imm3, @(disp12, Rn)
BXOR
Bit Exclusive Logical OR
Abstract
(<imm> of (disp+Rn)) ^ T
→ T
Bit exclusive OR
Code
0011nnnn0iii10010110dddddddddddd
Bit Manipulation Instruction
SH-2A/SH2A-FPU (New)
Cycle
3
T Bit
Operation
result