R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 212

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Instruction Descriptions
6.4.21
Format
DT
Description
The contents of general register Rn are decremented by 1 and the result compared to 0 (zero).
When the result is 0, the T bit is set to 1. When the result is not zero, the T bit is set to 0.
Operation
Example:
Rev. 3.00 Jul 08, 2005 page 196 of 484
REJ09B0051-0300
DT(long n)
{
}
LOOP:
Rn
R[n]--;
if (R[n]==0) T=1;
else T=0;
PC+=2;
DT
Decrement and Test
MOV
ADD
DT
BF
Abstract
Rn – 1 → Rn; When Rn is 0, 1 → T,
when Rn is nonzero, 0 → T
#4,R5 ; Sets the number of loops.
R0,R1 ;
R5
LOOP
/* DT Rn */
; Decrements the R5 value and checks whether it has become 0.
; Branches to LOOP is T=0. (In this example, loops 4 times.)
Decrement and Test
Code
0100nnnn00010000 1
Arithmetic Instruction
Cycle T Bit
Comparison
result