R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 475

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

(11) Floating-Point Register Load Instruction (12-Bit Displacement)
Instruction Type
Pipeline
• Single-Precision
• Double-Precision
Operation
• Single-Precision
• Double-Precision
Instruction A
Next instruction
Instruction after next
Instruction A
Next instruction
Instruction after next
FMOV.S
FMOV.D
The CPU pipeline ends after four stages – IF, ID, EX, MA – and the FPU pipeline after five
stages – IF, DF, EX, NA, SF. Contention may occur if an instruction that reads the destination
of this instruction is located within the 3 instructions following this instruction.
The CPU pipeline ends after five stages – IF, ID, EX, MA, MA – and the FPU pipeline after
six stages – IF, DF, EX, EX, NA, SF. Contention may occur if an instruction that reads the
destination of this instruction is located within the 3 instructions following this instruction.
@(disp12,Rm),FRn
@(disp12,Rm),DRn
↔ ↔ ↔ ↔ ↔ ↔ ↔ Slots
↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ Slots
IF
IF
IF
IF
DF
DF
ID
ID
IF
IF
IF
IF
IF
IF
EX
EX
DF
DF
EX
EX
—
ID
ID
—
IF
IF
MA
MA
NA
EX
EX
EX
EX
DF
E1
ID
—
—
MA
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
NA
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
NA
EX
DF
SF
E2
E1
ID
EX
SF
SF
SF
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
E2
E1
Rev. 3.00 Jul 08, 2005 page 459 of 484
SF
⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅ ⋅
E2
Section 8 Pipeline Operation
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
SF
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
REJ09B0051-0300