R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 256

IC SUPERH MPU ROMLESS 240QFP

R5S72030W200FP

Manufacturer Part Number
R5S72030W200FP
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7200r
Datasheets

Specifications of R5S72030W200FP

Core Processor
SH2A-FPU
Core Size
32-Bit
Speed
200MHz
Connectivity
CAN, I²C, SCI, SSI, SSU, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
82
Program Memory Type
ROMless
Ram Size
80K x 8
Voltage - Supply (vcc/vdd)
1.1 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
240-QFP
For Use With
R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 6 Instruction Descriptions
6.4.44
Format
ROTCL Rn
Description
Rotates the contents of general register Rn and the T bit to the left by one bit, and stores the result
in Rn. The bit that is shifted out of the operand is transferred to the T bit (figure 6.3).
Operation
Example:
Rev. 3.00 Jul 08, 2005 page 240 of 484
REJ09B0051-0300
ROTCL(long n) /* ROTCL Rn */
{
}
ROTCL R0
long temp;
if ((R[n]&0x80000000)==0) temp=0;
else temp=1;
R[n]<<=1;
if (T==1) R[n]|=0x00000001;
else R[n]&=0xFFFFFFFE;
if (temp==1) T=1;
else T=0;
PC+=2;
ROTCL
One-Bit Left Rotation
through T Bit
; Before execution: R0 = H'80000000, T = 0
; After execution:
Abstract
T ← Rn ← T
ROTCL
Figure 6.3 Rotate with Carry Left
ROTate with Carry Left
R0 = H'00000000, T = 1
T
MSB
Code
0100nnnn00100100
LSB
Shift Instruction
Cycle
1
T Bit
MSB

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