R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 160

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Instruction Descriptions
6.3.29
Format
PREF @Rn
Description
Reads a 16-byte data block starting at a 16-byte boundary into the operand cache.
Address related errors are not generated for this instruction. In the event of an error, this
instruction is handled as an NOP (no operation) instruction.
Note
On products with no cache, this instruction is handled as a NOP instruction.
Operation
Examples:
SOFT_PF:
Rev. 3.00 Jul 08, 2005 page 144 of 484
REJ09B0051-0300
PREF (long n)
{
PC+=2;
}
PREF
Prefetch to Data Cache
MOV.L SOFT_PF,R1
PREF
.align 16
.data.w H'1234
.data.w H'5678
.data.w H'9ABC
.data.w H'DEF0
/* PREF @Rn */
Abstract
Prefetch cache block
@R1
PREFetch data to cache
; R1 address is SOFT_PF
; Load SOFT_PF data into internal data cache
Code
0000nnnn10000011
Data Transfer Instruction
SH-2A/SH2A-FPU (New)
Cycle
1
T Bit
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