R5S72030W200FP Renesas Electronics America, R5S72030W200FP Datasheet - Page 254

• Manufacturer Part Number: R5S72030W200FP
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7200r

Specifications of R5S72030W200FP

• Core Processor: SH2A-FPU
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: CAN, I²C, SCI, SSI, SSU, USB
• Peripherals: DMA, LCD, POR, PWM, WDT
• Number Of I /o: 82
• Program Memory Type: ROMless
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 1.1 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 240-QFP
• For Use With: R0K572030S000BE - KIT DEV FOR SH7203HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Instruction Descriptions
6.4.43
Format
OR
OR
OR.B #imm,@(R0,GBR)
Description
Logically ORs the contents of general registers Rn and Rm, and stores the result in Rn. The
contents of general register R0 can also be ORed with zero-extended 8-bit immediate data, or 8-bit
memory data accessed by using indirect indexed GBR addressing can be ORed with 8-bit
immediate data.
Operation
Rev. 3.00 Jul 08, 2005 page 238 of 484
REJ09B0051-0300
OR(long m,long n)
{
}
ORI(long i)
{
}
ORM(long i)
{
}
Rm,Rn
#imm,R0
R[n]|=R[m];
PC+=2;
R[0]|=(0x000000FF & (long)i);
PC+=2;
long temp;
temp=(long)Read_Byte(GBR+R[0]);
temp|=(0x000000FF & (long)i);
Write_Byte(GBR+R[0],temp);
PC+=2;
OR
Logical OR
/* OR #imm,R0 */
/* OR.B #imm,@(R0,GBR) */
Abstract
Rn | Rm → Rn
R0 | imm → R0
(R0 + GBR) | imm → (R0 + GBR)
/* OR Rm,Rn */
OR logical
Code
0010nnnnmmmm1011
11001011iiiiiiii
11001111iiiiiiii
Logical Instruction
Cycle
1
1
3
T Bit
—
—
—