LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 149

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 160. LPC1111/12/13/14 pin description table (HVQFN33 package)
[1]
[2]
[3]
[4]
[5]
[6]
Table 161. LPC1112FHN24 Pin description table (HVQFN24 package)
UM10398
User manual
Symbol
PIO2_0
PIO2_0/DTR
PIO3_0 to PIO3_5
PIO3_2
PIO3_4
PIO3_5
V
XTALIN
XTALOUT
V
Symbol
RESET/PIO0_0
PIO0_1/CLKOUT/
CT32B0_MAT2
PIO0_2/SSEL0/
CT16B0_CAP0
DD
SS
5 V tolerant pad. RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up
from Deep power-down mode.
Serves as Deep-sleep wake-up input pin to the start logic independently of selected pin function (see the LPC111x/11C1x user manual).
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
I
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled, and the pin is not 5 V tolerant.
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
2
C-bus pads compliant with the I
HVQFN
pin
1
2
7
[1]
[3]
[3]
Pin
1
28
13
14
6; 29
4
5
33
[3]
[6]
[6]
[3]
[3]
[3]
Start
logic
input
yes
yes
yes
2
C-bus specification for I
Type
I/O
I/O
O
I/O
I/O
I/O
I/O
I
I
O
-
Chapter 9: LPC111x/LPC11Cxx Pin configuration (LPC1100, LPC1100C,
Type
I
I/O
I/O
O
O
I/O
I/O
I
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Description
Port 2 — Port 2 is a 12-bit I/O port with individual direction and function
controls for each bit. The operation of port 2 pins depends on the function
selected through the IOCONFIG register block. Pins PIO2_1 to PIO2_11
are not available.
PIO2_0 — General purpose digital input/output pin.
DTR — Data Terminal Ready output for UART.
Port 3 — Port 3 is a 12-bit I/O port with individual direction and function
controls for each bit. The operation of port 3 pins depends on the function
selected through the IOCONFIG register block. Pins PIO3_0, PIO3_1,
PIO3_3 and PIO3_6 to PIO3_11 are not available.
PIO3_2 — General purpose digital input/output pin.
PIO3_4 — General purpose digital input/output pin.
PIO3_5 — General purpose digital input/output pin.
3.3 V supply voltage to the internal regulator, the external rail, and the ADC.
Also used as the ADC reference voltage.
Input to the oscillator circuit and internal clock generator circuits. Input
voltage must not exceed 1.8 V.
Output from the oscillator amplifier.
Thermal pad. Connect to ground.
Reset
state
[1]
I; PU
-
I; PU
-
-
I; PU
-
-
2
C standard mode and I
Description
RESET — External reset input with 20 ns glitch filter. A
LOW-going pulse as short as 50 ns on this pin resets the
device, causing I/O ports and peripherals to take on their
default states, and processor execution to begin at address 0.
PIO0_0 — General purpose digital input/output pin with 10 ns
glitch filter.
PIO0_1 — General purpose digital input/output pin. A LOW
level on this pin during reset starts the ISP command handler.
CLKOUT — Clockout pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave Select for SPI0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
…continued
2
C Fast-mode Plus.
UM10398
© NXP B.V. 2012. All rights reserved.
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