LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 195

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
13.5.5 UART Interrupt Identification Register (U0IIR - 0x4004 8008, Read
Table 188. UART Interrupt Enable Register (U0IER - address 0x4000 8004 when DLAB = 0) bit
Only)
U0IIR provides a status code that denotes the priority and source of a pending interrupt.
The interrupts are frozen during a U0IIR access. If an interrupt occurs during a U0IIR
access, the interrupt is recorded for the next U0IIR access.
Table 189. UART Interrupt Identification Register (U0IIR - address 0x4004 8008, Read Only)
Bits U0IIR[9:8] are set by the auto-baud function and signal a time-out or end of auto-baud
condition. The auto-baud interrupt conditions are cleared by setting the corresponding
Clear bits in the Auto-baud Control Register.
Bit
9
31:10 -
Bit
0
3:1
5:4
7:6
8
9
31:10 -
Symbol
ABTOINTEN
Symbol
INTSTATUS
INTID
-
FIFOENABLE
ABEOINT
ABTOINT
description
bit description
All information provided in this document is subject to legal disclaimers.
Value
Rev. 12 — 24 September 2012
Valu
e
0x3 1 - Receive Line Status (RLS).
0x2 2a - Receive Data Available (RDA).
0x6 2b - Character Time-out Indicator (CTI).
0x1 3 - THRE Interrupt.
0x0 4 - Modem interrupt.
0
1
…continued
0
1
Description
Interrupt status. Note that U0IIR[0] is active low. The
pending interrupt can be determined by evaluating
U0IIR[3:1].
At least one interrupt is pending.
No interrupt is pending.
Interrupt identification. U0IER[3:1] identifies an interrupt
corresponding to the UART Rx FIFO. All other combinations
of U0IER[3:1] not listed below are reserved (100,101,111).
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
These bits are equivalent to U0FCR[0].
End of auto-baud interrupt. True if auto-baud has finished
successfully and interrupt is enabled.
Auto-baud time-out interrupt. True if auto-baud has timed
out and interrupt is enabled.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Description
Enables the auto-baud time-out interrupt.
Disable auto-baud time-out Interrupt.
Enable auto-baud time-out Interrupt.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 13: LPC111x/LPC11Cxx UART
UM10398
© NXP B.V. 2012. All rights reserved.
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Reset
value
0
NA
Reset
value
1
0
NA
0
0
0
NA