LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 258

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 239. Slave Receiver mode
UM10398
User manual
Status
Code
(STAT)
0x60
0x68
0x70
0x78
0x80
0x88
0x90
Status of the I
and hardware
Own SLA+W has
been received; ACK
has been returned.
Arbitration lost in
SLA+R/W as master;
Own SLA+W has
been received, ACK
returned.
General call address
(0x00) has been
received; ACK has
been returned.
Arbitration lost in
SLA+R/W as master;
General call address
has been received,
ACK has been
returned.
Previously addressed
with own SLV
address; DATA has
been received; ACK
has been returned.
Previously addressed
with own SLA; DATA
byte has been
received; NOT ACK
has been returned.
Previously addressed
with General Call;
DATA byte has been
received; ACK has
been returned.
2
C-bus
Application software response
To/From DAT
No DAT action or
No DAT action
No DAT action or
No DAT action
No DAT action or
No DAT action
No DAT action or
No DAT action
Read data byte or X
Read data byte
Read data byte or 0
Read data byte or 0
Read data byte or 1
Read data byte
Read data byte or X
Read data byte
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
To CON
STA STO SI
X
X
X
X
X
X
X
X
X
1
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Chapter 15: LPC111x/LPC11Cxx I2C-bus controller
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next action taken by I
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will
be returned.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will
be returned.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will
be returned.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will
be returned.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will
be returned.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
ADR[0] = logic 1.
Switched to not addressed SLV mode; no
recognition of own SLA or General call
address. A START condition will be
transmitted when the bus becomes free.
Switched to not addressed SLV mode;
Own SLA will be recognized; General call
address will be recognized if
ADR[0] = logic 1. A START condition will
be transmitted when the bus becomes
free.
Data byte will be received and NOT ACK
will be returned.
Data byte will be received and ACK will
be returned.
UM10398
© NXP B.V. 2012. All rights reserved.
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C hardware
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