LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 185

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
12.3.2 GPIO data direction register
12.3.3 GPIO interrupt sense register
The following rules apply when the pins are switched from input to output:
The rules show that the pins mirror the current logic level. Therefore floating pins may
drive an unpredictable level when switched from input to output.
Table 174. GPIOnDIR register (GPIO0DIR, address 0x5000 8000 to GPIO3DIR, address
Table 175. GPIOnIS register (GPIO0IS, address 0x5000 8004 to GPIO3IS, address 0x5003
Bit
11:0
31:12
Bit
11:0
31:12
•
•
•
•
•
If a pin is configured as GPIO input, a write to the GPIOnDATA register has no effect
on the pin level. A read returns the current state of the pin.
If a pin is configured as GPIO output, the current value of GPIOnDATA register is
driven to the pin. This value can be a result of writing to the GPIOnDATA register, or it
can reflect the previous state of the pin if the pin is switched to GPIO output from
GPIO input or another digital function. A read returns the current state of the output
latch.
If a pin is configured as another digital function (input or output), a write to the
GPIOnDATA register has no effect on the pin level. A read returns the current state of
the pin even if it is configured as an output. This means that by reading the
GPIOnDATA register, the digital output or input value of a function other than GPIO on
that pin can be observed.
Pin is configured as input with a HIGH level applied:
– Change pin to output: pin drives HIGH level.
Pin is configured as input with a LOW level applied:
– Change pin to output: pin drives LOW level.
Symbol
IO
-
Symbol
ISENSE
-
0x5003 8000) bit description
8004) bit description
All information provided in this document is subject to legal disclaimers.
Description
Selects pin x as input or output (x = 0 to 11).
0 = Pin PIOn_x is configured as input.
1 = Pin PIOn_x is configured as output.
Reserved
Description
Selects interrupt on pin x as level or edge sensitive (x = 0 to
11).
0 = Interrupt on pin PIOn_x is configured as edge sensitive.
1 = Interrupt on pin PIOn_x is configured as level sensitive.
Reserved
Rev. 12 — 24 September 2012
Chapter 12: LPC111x/LPC11Cxx General Purpose I/O (GPIO)
-
Reset value
0x00
UM10398
© NXP B.V. 2012. All rights reserved.
Reset
value
0x00
-
185 of 538
-
Access
R/W
Access
R/W
-