LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 244

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
15.8.3 Slave Receiver mode
After a Repeated START condition, I
In the slave receiver mode, data bytes are received from a master transmitter. To initialize
the slave receiver mode, write any of the Slave Address registers (ADR0-3) and write the
I
Table 232. I2C0CONSET and I2C1CONSET used to configure Slave mode
I2EN must be set to 1 to enable the I
its own slave address or the General Call address. The STA, STO and SI bits are set to 0.
After ADR and CONSET are initialized, the I
own address or general address followed by the data direction bit. If the direction bit is 0
(W), it enters slave receiver mode. If the direction bit is 1 (R), it enters slave transmitter
mode. After the address and direction bit have been received, the SI bit is set and a valid
status code can be read from the Status register (STAT). Refer to
codes and actions.
2
Bit
Symbol
Value
Fig 46. Format of Master Receiver mode
Fig 47. A Master Receiver switches to Master Transmitter after sending Repeated START
C Control Set register (CONSET) as shown in
S
S
from Master to Slave
from Slave to Master
From master to slave
From slave to master
SLA
SLAVE ADDRESS
7
-
-
R
All information provided in this document is subject to legal disclaimers.
A
Rev. 12 — 24 September 2012
6
I2EN
1
DATA
n bytes data transmitted
RW=1
5
STA
0
A
Chapter 15: LPC111x/LPC11Cxx I2C-bus controller
2
2
A
DATA
C may switch to the master transmitter mode.
C function. AA bit must be set to 1 to acknowledge
4
STO
0
2
A
DATA
C interface waits until it is addressed by its
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
Table
Sr
3
SI
0
232.
SLA
n bytes data received
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
SLA = Slave Address
Sr = Repeated START condition
A
2
AA
1
W
DATA
Table 239
A
UM10398
1
-
-
© NXP B.V. 2012. All rights reserved.
DATA
for the status
A
A
0
-
-
244 of 538
P
P