LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 449

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LPC1114FHN33/203,5

Manufacturer Part Number
LPC1114FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1114FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
See the instruction descriptions
information about how to access the program status registers.
Application Program Status Register:
condition flags, from previous instruction executions. See the register summary in
Table 28–419
Table 421. APSR bit assignments
See
borrow, and overflow flags.
Interrupt Program Status Register:
current Interrupt Service Routine (ISR). See the register summary in
its attributes. The bit assignments are:
Table 422. IPSR bit assignments
Execution Program Status Register:
See the register summary in
are:
Bits
[31]
[30]
[29]
[28]
[27:0]
Bits
[31:6]
[5:0]
Section 28.5.4.1.4
for its attributes. The bit assignments are:
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Name
N
Z
C
V
-
Name
-
Exception number This is the number of the current exception:
Rev. 12 — 24 September 2012
for more information about the APSR negative, zero, carry or
Table 28–419
Section 28–28.5.7.6
Function
Negative flag
Zero flag
Carry or borrow flag
Overflow flag
Reserved
Function
Reserved
0 = Thread mode
1 = Reserved
2 = NMI
3 = HardFault
4-10 = Reserved
11 = SVCall
12, 13 = Reserved
14 = PendSV
15 = SysTick
16 = IRQ0
.
.
.
47 = IRQ31
48-63 = Reserved.
see
The IPSR contains the exception number of the
The EPSR contains the Thumb state bit.
Section 28–28.4.3.2
The APSR contains the current state of the
for the EPSR attributes. The bit assignments
and
Section 28–28.5.7.7
for more information.
UM10398
Table 28–419
© NXP B.V. 2012. All rights reserved.
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