LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 430

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
Define pointer to function type, which takes two parameters and returns void. Note the IAP
returns the result with the base address of the table residing in R1.
typedef void (*IAP)(unsigned int [],unsigned int[]);
IAP iap_entry;
Setting function pointer:
iap_entry=(IAP) IAP_LOCATION;
Whenever you wish to call IAP you could use the following statement.
iap_entry (command, result);
As per the ARM specification (The ARM Thumb Procedure Call Standard SWS ESPC
0002 A-05) up to 4 parameters can be passed in the r0, r1, r2 and r3 registers
respectively. Additional parameters are passed on the stack. Up to 4 parameters can be
returned in the r0, r1, r2 and r3 registers respectively. Additional parameters are returned
indirectly via memory. Some of the IAP calls require more than 4 parameters. If the ARM
suggested scheme is used for the parameter passing/returning then it might create
problems due to difference in the C compiler implementation from different vendors. The
suggested parameter passing scheme reduces such risk.
The flash memory is not accessible during a write or erase operation. IAP commands,
which results in a flash write/erase operation, use 32 bytes of space in the top portion of
the on-chip RAM for execution. The user program should not be use this space if IAP flash
programming is permitted in the application.
Table 394. IAP Command Summary
IAP Command
Prepare sector(s) for write operation
Copy RAM to flash
Erase sector(s)
Blank check sector(s)
Read Part ID
Read Boot code version
Compare
Reinvoke ISP
Read UID
Erase page
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
Command Code
50 (decimal)
51 (decimal)
52 (decimal)
53 (decimal)
54 (decimal)
55 (decimal)
56 (decimal)
57 (decimal)
58 (decimal)
59 (decimal)
Described in
Table 395
Table 396
Table 397
Table 398
Table 399
Table 400
Table 401
Table 402
Table 403
Table 404
UM10398
© NXP B.V. 2012. All rights reserved.
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