LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 395

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
23.8 Block diagram
UM10398
User manual
23.7.4 Watchdog Timer Value register (WDTV - 0x4000 400C)
Interrupts should be disabled during the feed sequence. An abort condition will occur if an
interrupt happens during the feed sequence.
Table 354. Watchdog Feed register (WDFEED - address 0x4000 4008) bit description
The WDTV register is used to read the current value of Watchdog timer.
When reading the value of the 24-bit timer, the lock and synchronization procedure takes
up to 6 WDCLK cycles plus 6 PCLK cycles, so the value of WDTV is older than the actual
value of the timer when it's being read by the CPU.
Table 355. Watchdog Timer Value register (WDTV - address 0x4000 000C) bit description
The block diagram of the Watchdog is shown below in the
logic (PCLK/WDCLK) is not shown in the block diagram.
Bit
7:0
31:8
Bit
23:0
31:24
Fig 88. Watchdog block diagram
Symbol
Feed
-
Symbol
Count
-
wdt_clk
All information provided in this document is subject to legal disclaimers.
Description
Feed value should be 0xAA followed by 0x55.
Reserved
Description
Counter timer value.
Reserved
Rev. 12 — 24 September 2012
feed sequence
WDFEED
feed error
Chapter 23: LPC111x/LPC11Cxx WatchDog Timer (WDT)
feed ok
4
WDINT WDTOF WDRESET
24-BIT DOWN COUNTER
Figure
underflow
WMOD register
WDTC
88. The synchronization
SHADOW BIT
UM10398
© NXP B.V. 2012. All rights reserved.
Reset Value
NA
-
Reset Value
0x0000 00FF
-
WDEN
enable
count
395 of 538
reset
interrupt