LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 289

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
16.6.2.4 IF1 and IF2 message buffer registers
Table 256. CAN message interface command mask registers (CANIF1_CMDMSK, address
The bits of the Message Buffer registers mirror the Message Objects in the Message
RAM.
Bit
2
3
4
5
6
7
31:8
Symbol
NEWDAT
CLRINTPND
CTRL
ARB
MASK
WR/RD
-
0x4005 0024 and CANIF2_CMDMSK, address 0x4005 0084) bit description - read
direction
All information provided in this document is subject to legal disclaimers.
…continued
Rev. 12 — 24 September 2012
Value Description
0
1
0
1
0
1
0
1
0
1
0
-
Access new data bit
NEWDAT bit remains unchanged.
Remark: A read access to a message object
can be combined with the reset of the control
bits INTPND and NEWDAT in IF1/2_MCTRL.
The values of these bits transferred to the IFx
Message Control Register always reflect the
status before resetting these bits.
Clear NEWDAT bit in the message object.
Clear interrupt pending bit.
INTPND bit remains unchanged.
Clear INTPND bit in the message object.
Access control bits
Control bits unchanged.
Transfer control bits to IFx message buffer.
Access arbitration bits
Arbitration bits unchanged.
Transfer Identifier, DIR, XTD, and MSGVAL
bits to IFx message buffer register.
Access mask bits
Mask bits unchanged.
Transfer Identifier MASK + MDIR + MXTD to
IFx message buffer register.
Read transfer
Transfer data from the message object
addressed by the command request register
to the selected message buffer registers
CANIFn_CMDREQ.
reserved
Chapter 16: LPC111x/LPC11Cxx C_CAN controller
UM10398
© NXP B.V. 2012. All rights reserved.
Reset
value
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
-
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